Max A. Cherney
The U.S. Commerce Department has implemented an export control on advanced chip design software that’s necessary to produce next-generation processors, expanding on existing controls that target chipmaking tools with the goal of hampering Chinese efforts to build the most complex chips domestically.
The new export restrictions targets electronic design automation, or EDA, software produced by the likes of Cadence and Synopsys. The goal is to hamper Chinese companies pursuing AI applications and prevent them from building chips with an emerging technology called gate all around, according to a person familiar with the Biden Administration’s plans. The advanced design tools are necessary to make chips with gate-all-around designs that are capable of delivering substantially more computing horsepower with far less energy than today's chips.
The Commerce Department issued the new rule Friday, though Protocol first reported on the pending plan to block advanced EDA software exports earlier this month.
China’s effort to manufacture the most-advanced chips has roughly stalled at the 14-nanometer level, a process that the likes of TSMC, Samsung and Intel perfected about eight years ago. In recent weeks, a report emerged that China had successfully made a 7-nanometer chip, though experts in some corners of the industry were skeptical of the claims.
Nanometer naming conventions can be misleading, however. At one point they referred to the size of a specific feature on a chip but today mostly amounts to marketing terminology.
In addition to blocking advanced design software, officials said the U.S. would restrict gallium oxide and diamond, materials that are used to make chips work under extreme temperature or energy conditions that are often useful for the military.
The Commerce Department said it is implementing the chip-related restrictions agreed upon in December by the 42 countries participating in the Wassenaar Arrangement, an international arms control agreement.
No comments:
Post a Comment